cystech electronics corp. spec. no. : c911v8 issued date : 2013.12.02 revised date : page no. : 1/9 MTDN8233CDV8 cystek product specification common drain dual n -channel enhancement mode mosfet MTDN8233CDV8 bv dss 20v i d v gs =4.5v 10a v gs =4.5v, i d =5.5a 8.1m v gs =4.0v, i d =5.5a 8.4m v gs =3.7v, i d =5.5a 8.6 m v gs =3.1v, i d =5.5a 9.4 m r dson ( typ .) features ? simple drive requirement v gs =2.5v, i d =5.5a 10.5 m ? low gate charge ? low on-resistance ? fast switching speed ? esd protected ? pb-free lead plating and halogen-free package equivalent circuit outline ordering information device package shipping MTDN8233CDV8-0-t6-g dfn3 3 (pb-free lead plating and halogen-free package) 3000 pcs / tape & reel dfn3 3 MTDN8233CDV8 p in 1 g gate s source d drain environment friendly grade : s for rohs compliant products, g for rohs compliant and green compound products packing spec, t6 : 3000 pc s / tape & reel,13? reel product rank, zero for no rank products product name
cystech electronics corp. spec. no. : c911v8 issued date : 2013.12.02 revised date : page no. : 2/9 MTDN8233CDV8 cystek product specification absolute maximum ratings (ta=25 c, unless otherwise specified) parameter symbol limits unit drain-source voltage v ds 20 gate-source voltage v gs 12 v continuous drain current @ v gs =4.5v, t c =25 c 30 continuous drain current @ v gs =4.5v, t c =100 c 19 continuous drain current @ v gs =4.5v, t a =25 c 10 continuous drain current @ v gs =4.5v, t a =70 c i d 8 pulsed drain current i dm 70 *1, 2 a t a =25 2.5 *3 total power dissipation t a =70 p d 1.6 w operating junction and storage temp erature range tj, tstg -55~+150 c thermal data parameter symbol value unit thermal resistance, junction-to-case, max r th,j-c 6 c/w thermal resistance, junction-to-ambient, max r th,j-a 50 *3 c/w note : 1. pulse width limited by maximum junction temperature. 2. duty cycle 1%. 3. surface mount ed on a 1 in2 pad of 2oz copper. in practice r th,j-a will be determined by the customer?s pcb characteristics. electrical characteristics (tj=25 c, unless otherwise specified) symbol min. typ. max. unit test conditions static bv dss 20 - - v v gs =0, i d =250 a ? bv dss / ? tj - 0.02 - v/ c reference to 25c, i d =1ma v gs(th) 0.5 0.72 1.5 v v ds =v gs , i d =1ma i gss - - 10 v gs =12v, v ds =0 - - 1 v ds =18v, v gs =0 i dss - - 10 a v ds =16v, v gs =0, tj=70c 5.0 8.1 10.5 i d =5.5a, v gs =4.5v 5.2 8.4 10.7 i d =5.5a, v gs =4v 5.4 8.6 11.0 i d =5.5a, v gs =3.7v 5.8 9.4 11.5 i d =5.5a, v gs =3.1v *r ds(on) 6.0 10.5 12.0 m i d =5.5a, v gs =2.5v *g fs - 18 - s v ds =5v, i d =5.5a dynamic ciss - 1350 - coss - 185 - crss - 160 - pf v ds =10v, v gs =0, f=1mhz
cystech electronics corp. spec. no. : c911v8 issued date : 2013.12.02 revised date : page no. : 3/9 MTDN8233CDV8 cystek product specification *t d(on) - 28 - *t r - 64 - *t d(off) - 60 - *t f - 55 - ns v ds =16v, i d =5.5a, v gs =4.5v, r g =6 *qg - 15 - *qgs - 2.8 - *qgd - 4.4 - nc v ds =16v, i d =10a, v gs =4.5v source-drain diode *v sd - 0.82 1.2 v v gs =0v, i s =10a *pulse test : pulse width 300 s, duty cycle 2% recommended soldering footprint unit : mm
cystech electronics corp. spec. no. : c911v8 issued date : 2013.12.02 revised date : page no. : 4/9 MTDN8233CDV8 cystek product specification typical characteristics typical output characteristics 0 10 20 30 40 50 60 70 012345 vds, drain-source voltage(v) i d , drain current (a) 5v,4.5v,4v,3.5v,3v,2.5v v gs =2v v gs =1.5v brekdown voltage vs junction temperature 0.4 0.6 0.8 1 1.2 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) bv dss , normalized drain-source breakdown voltage i d =250 a, v gs =0v static drain-source on-state resistance vs drain current 1 10 100 1000 0.01 0.1 1 10 100 i d , drain current(a) r ds(on) , static drain-source on-state resistance(m) v gs =1.5v v gs =2v 2.5 v 3.1 v 3.7 v 4v 4.5 v reverse drain current vs source-drain voltage 0.2 0.4 0.6 0.8 1 1.2 04812162 i dr , reverse drain current(a) v sd , source-drain voltage(v) 0 tj=25c tj=150c v gs =0v static drain-source on-state resistance vs gate-source voltage 0 20 40 60 80 100 024681 0 drain-source on-state resistance vs junction tempearture 0.4 0.8 1.2 1.6 2 2.4 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) r ds(on) , normalized static drain- source on-state resistance v gs =4.5v, i d =5.5a r dson @ tj=25c : 8.1 m typ v gs , gate-source voltage(v) r ds(on) , static drain-source on- state resistance(m) i d =5.5a
cystech electronics corp. spec. no. : c911v8 issued date : 2013.12.02 revised date : page no. : 5/9 MTDN8233CDV8 cystek product specification typical characteristics(cont.) capacitance vs drain-to-source voltage 10 100 1000 10000 0.1 1 10 100 v ds , drain-source voltage(v) capacitance---(pf) c oss ciss crss threshold voltage vs junction tempearture 0.4 0.6 0.8 1 1.2 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) v gs(th) , normalized threshold voltage i d =250 a i d =1ma forward transfer admittance vs drain current 0.01 0.1 1 10 100 0.001 0.01 0.1 1 10 i d , drain current(a) g fs , forward transfer admittance(s) ta=25c pulsed v ds =5v gate charge characteristics 0 1 2 3 4 5 048121620 qg, total gate charge(nc) v gs , gate-source voltage(v) i d =10a v ds =16v v ds =10v v ds =4v maximum safe operating area 0.01 0.1 1 10 100 0.1 1 10 100 v ds , drain-source voltage(v) i d , drain current(a) t a =25c, tj=150c v gs =4.5v, r ja =50c/w single pulse dc 100ms r dson limite 100 s 1ms 1s 10ms maximum drain current vs junction temperature 0 2 4 6 8 10 12 25 50 75 100 125 150 175 tj, junction temperature(c) i d , maximum drain current(a) t a =25c, v gs =4.5v, r ja =50c/w
cystech electronics corp. spec. no. : c911v8 issued date : 2013.12.02 revised date : page no. : 6/9 MTDN8233CDV8 cystek product specification typical characteristics(cont.) typical transfer characteristics 0 10 20 30 40 50 60 70 012345 v gs , gate-source voltage(v) i d , drain current(a) v ds =5v single pulse power rating, junction to ambient (note on page 2) 0 10 20 30 40 50 0.001 0.01 0.1 1 10 100 1000 pulse width(s) power (w) t j(max) =150c t a =25c ja =50c/w transient thermal response curves 0.001 0.01 0.1 1 1.e-04 1.e-03 1.e-02 1.e-01 1.e+00 1.e+01 1.e+02 1.e+03 t 1 , square wave pulse duration(s) r(t), normalized effective transient thermal resistance single pulse 0.01 0.02 0.05 0.1 0.2 d=0.5 1.r ja (t)=r(t)*r ja 2.duty factor, d=t 1 /t 2 3.t jm -t a =p dm *r ja (t) 4.r ja =50c/w
cystech electronics corp. spec. no. : c911v8 issued date : 2013.12.02 revised date : page no. : 7/9 MTDN8233CDV8 cystek product specification reel dimension carrier tape dimension
cystech electronics corp. spec. no. : c911v8 issued date : 2013.12.02 revised date : page no. : 8/9 MTDN8233CDV8 cystek product specification recommended wave soldering condition product peak temperature soldering time pb-free devices 260 +0/-5 c 5 +1/-1 seconds recommended temperature profile for ir reflow profile feature sn-pb eutectic assembly pb-free assembly average ramp-up rate (tsmax to tp) 3 c/second max. 3 c/second max. preheat ? temperature min(t s min) ? temperature max(t s max) ? time(ts min to ts max ) 100 c 150 c 60-120 seconds 150 c 200 c 60-180 seconds time maintained above: ? temperature (t l ) ? time (t l ) 183 c 60-150 seconds 217 c 60-150 seconds peak temperature(t p ) 240 +0/-5 c 260 +0/-5 c time within 5 c of actual peak temperature(tp) 10-30 seconds 20-40 seconds ramp down rate 6 c/second max. 6 c/second max. time 25 c to peak temperature 6 minutes max. 8 minutes max. note : all temperatures refer to topside of t he package, measured on the package body surface.
cystech electronics corp. spec. no. : c911v8 issued date : 2013.12.02 revised date : page no. : 9/9 MTDN8233CDV8 cystek product specification dfn3 3 dimension 8-lead dfn3 3 plastic package cystek package code: v8 s1 g1 s2 g2 8233 date code d d d d marking : *: typical millimeters inches millimeters inches dim min. max. min. max. dim min. max. min. max. a 0.650 0.850 0.026 0.033 b 0.200 0.400 0.008 0.016 a1 0.152 ref 0.006 ref e 0.550 0.750 0.022 0.030 a2 0.000 0.050 0.000 0.002 l 0.300 0.500 0.012 0.020 d 2.900 3.100 0.114 0.122 l1 0.180 0.480 0.007 0.019 d1 2.300 2.600 0.091 0.102 l2 0.000 0.100 0.000 0.004 e 2.900 3.100 0.114 0.122 l3 0.000 0.100 0.000 0.004 e1 3.150 3.450 0.124 0.136 h 0.315 0.515 0.012 0.020 e2 1.535 1.935 0.060 0.076 9 13 9 13 notes: 1.controlling dimension: millimeters. 2.maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.if there is any question with packing specification or packing method, please c ontact your local cystek sales office. material: ? lead: pure tin plated. ? mold compound: epoxy resin family, flammability solid burning class: ul94v-0. important notice: ? all rights are reserved. reproduction in whole or in part is prohibited without the prior written approval of cystek. ? cystek reserves the right to make changes to its products without notice. ? cystek semiconductor products are not warranted to be suitable for use in life-support applications, or systems. ? cystek assumes no liability for any consequence of customer pr oduct design, infringement of pat ents, or application assistance .
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